发明名称 Method of making self-aligned gate MOS device having small channel lengths
摘要 A semiconductor structure wherein a masking layer is formed to cover a portion of a surface of a semiconductor. A first doped region is formed in a portion of the semiconductor exposed by the masking layer. A chemical etchant is brought into contact with the masking layer, reducing the area of the masking layer covering the semiconductor exposing a second, different portion of the semiconductor contiguous to the first exposed portion of the semicoductor. Particles capable of establishing a doped region in the semiconductor layer are introduced into the second, different exposed portion of the semiconductor to form a second doped region in the semiconductor contiguous to the first doped region, such chemically etched masking layer inhibiting such particles from becoming introduced into the portion of the semiconductor disposed beneath the chemically etched masking layer. With such methods a self-aligned gate region may be formed in a field effect device having small channel lengths.
申请公布号 US4402761(A) 申请公布日期 1983.09.06
申请号 US19820342861 申请日期 1982.01.26
申请人 RAYTHEON COMPANY 发明人 FEIST, WOLFGANG M.
分类号 H01L21/033;H01L21/336;H01L29/10;H01L29/423;H01L29/78;(IPC1-7):H01L21/30;H01L21/26 主分类号 H01L21/033
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