发明名称 INTEGRATED CIRCUIT MEMORY
摘要 PURPOSE:To obtain the memory having high density by stacking the gate electrode of an IGFET and the electrode of a capacitance element when the IGFET and the capacitance element are formed onto a substrate and the IC memory is formed by connecting the FET and the capacitance element. CONSTITUTION:The surface of a P type Si substrate 1 is coated with an SiO2 gate insulating film 2 with approximately 300Angstrom thickness, gate electrodes 3, 4 consisting of polycrystalline Si to which phosphorus is added are formed onto the film 2, and these electrodes are coated with Si3N4 films 7, 8 each forming active regions through SiO2 films 5, 6 with approximately 100Angstrom . Thick SiO2 films 9 using P<+> type regions 10 for preventing a parasitic effect as underlays are formed while surrounding the active regions, the films 7, 8 on the active regions are partitioned, size is shrunk, a capacitance element electrode 11 consisting of polycrystalline Si to which phosphorus is added is formed onto the films 7, 8, and the surface exposed is coated with a SiO2 film 12 with approximately 5,000Angstrom thickness. Ions are implanted while using the film 12 as a mask, N type regions 13, 14 adjacent to the regions 10 are formed, and the whole is coated with Al wiring 15 including the electrodes 3, 4 exposed by partitioning the films 7, 8.
申请公布号 JPS58155755(A) 申请公布日期 1983.09.16
申请号 JP19830025684 申请日期 1983.02.18
申请人 NIPPON DENKI KK 发明人 WADA TOSHIO
分类号 H01L27/10;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
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