Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage

摘要

The demand for increased performance and shrinking geometry from ICs has brought the introduction of multi-gate devices including finFET devices. Inducing a higher tensile strain/stress in a region provides for enhanced electron mobility, which may improve performance. High temperature processes during device fabrication tend to relax the stress on these strain inducing layers. The present disclosure relates to a method of forming a strain inducing layer or cap layer at the RPG (replacement poly silicon gate) stage of a finFET device formation process. In some embodiments, the strain inducing layer is doped to reduce the external resistance.

主权项

1. A method of forming a strain inducing layer overlaying a channel in a finFET (fin field-effect transistor) device, comprising:
forming a dummy gate over an upper surface of a fin of semiconductor material and along sidewalls of the fin, wherein the fin corresponds to channel region of the finFET device; forming source/drain regions for the finFET device on opposite edges of the dummy gate while the dummy gate is in place over the channel region; removing the dummy gate after the source/drain regions have been formed and leaving a remaining portion of fin in place after the dummy gate has been removed; and forming a strain inducing layer over an upper surface of the remaining portion of the fin and along sidewalls of the remaining portion of the fin.