发明名称 |
Semiconductor apparatus having TSV and testing method thereof |
摘要 |
A test method of a semiconductor apparatus before a wafer is ground may include applying voltages to a bump electrically coupled to a through-silicon via (TSV) which is buried in the wafer and a first conductive layer formed to be electrically connected to a rear surface of the TSV, wherein the first conductive layer is withdrawn into an upper surface of the wafer. The method may include measuring a voltage between the bump and the first conductive layer. The method may include comparing the measured voltage to a preset reference voltage. The method may include determining the TSV as a normal TSV in which no fail occurs, according a comparing result, and grinding the wafer to expose the rear surface of the TSV. |
申请公布号 |
US9455190(B2) |
申请公布日期 |
2016.09.27 |
申请号 |
US201514822727 |
申请日期 |
2015.08.10 |
申请人 |
SK hynix Inc. |
发明人 |
Cho Hyung Jun |
分类号 |
H01L21/66;H01L21/768;H01L21/304;H01L21/02;H01L23/48 |
主分类号 |
H01L21/66 |
代理机构 |
William Park & Associates Ltd. |
代理人 |
William Park & Associates Ltd. |
主权项 |
1. A test method of a semiconductor apparatus before a wafer is ground, comprising the steps of:
applying voltages to a bump electrically coupled to a through-silicon via (TSV) which is buried in the wafer and a first conductive layer formed to be electrically connected to a rear surface of the TSV, wherein the first conductive layer is withdrawn into an upper surface of the wafer; measuring a voltage between the bump and the first conductive layer; comparing the measured voltage to a preset reference voltage; determining the TSV as a normal TSV in which no fail occurs, according a comparing result; and grinding the wafer to expose the rear surface of the TSV. |
地址 |
Icheon-si, Gyeonggi-do KR |