发明名称 DIGITAL-ANALOG CONVERTER
摘要 PURPOSE:To reduce the time constant of a filter and to quicken the response speed, by subdividing the period of D/A conversion into plural numbers and generating a rectangular wave having a time ratio corresponding to the converted value in the plural sections divided minutely. CONSTITUTION:A digital signal 102 latched at a latch circuit 101 is divided into two and a high-order bit is given to a counter 104a. Further, the low-order bit of the signal 102 is given to a counter 104b and when a time corresponding to a digital value of the low-order bit is elapsed, the output of the counter 104b is returned to all 0 and this output is detected at a detecting circuit 105. The output signal of the counter 105 is given to an FF310 and a rectangular wave signal 403 is outputted from an output terminal Q of the FF310 and one period of a signal phi2 is divided into two in the ratio corresponding to the low-order bit of the signal 102 with this signal 403. The output of a gate 308 detecting all ''0'' of a counter 101a and the signal 403 are given to a switching circuit 306. Thus, the rectangular wave having the time ratio corresponding to the vlaue of the signal 102 is obtained at each period divided into two from the circuit 306.
申请公布号 JPS5911026(A) 申请公布日期 1984.01.20
申请号 JP19820120810 申请日期 1982.07.12
申请人 YOKOGAWA HOKUSHIN DENKI KK 发明人 TANAKA FUJINAO
分类号 H03M1/82 主分类号 H03M1/82
代理机构 代理人
主权项
地址