| 摘要 |
PURPOSE:To attain high speed processing, by confirming whether or not an input data fed to a multiplier is zero at first and executing arithmetic only when it is not zero. CONSTITUTION:An input data is inputted from data buses 2 and 3 having a multiplier and a multiplicand to the multiplier 1, and the result of multiplication is outputted to an output bus 4. Further, the multiplier data bus 2 and the multiplicand data bus 3 are connected respectively to OR circuits 5, 6. When the multiplier or the multiplicand is zero, and bits are ORed, and whether or not the number is zero is discriminated with the output or the OR circuit immediately. The output of the OR circuits 5, 6 is discriminated at a zero discriminator 7, and when any of the multiplier or the multiplicand is zero, a zero flag 8 is set. A control circuit 9 instructs the arithmetic to the multiplier 1 when the zero flag 8 is not set. |
