| 摘要 |
<p>A memory circuit provided with improved noise-prevention circuit arrangement for word lines is disclosed. The memory circuit is structured in such a manner that each word decoder is provided for each word line group including a plurality of word lines for selecting the associated word line group, and a noise-prevention circuit of a flip-flop type is provided for each of the word decoder for preventing an output of the word decoder from floating when that word decoder is not selected.</p> |
