| 摘要 |
PURPOSE:To obtain a double-intersection/bit semiconductor memory which has a high-speed operation and no difference of stray capactiy between the data pair lines, by using a metal to a word line and the poly-crystalline silicon or other metals to the data pair line respectively and giving at least a cross between the data pair lines. CONSTITUTION:The storage capacitors Cs1 and Cs2 and transfer MOS transistors Q1 and Q2 are produced with a p type silicon substrate 1, a field oxide film 2, a gate oxide film 3, the 1st layer poly-crystalline silicon 4, an inter- layer oxide film 5, an oxide film 6, the 2nd layer poly-crystalline silicon 7, and a diffusion layer 8 respectively. The word lines WO-W3 are made of aluminum, etc.; while data lines DO, DO'-D2 and D2' are made of poly-crystalline silicon or metals other than aluminum such as Mo, etc. At least a cross is given to the data pair lines, and an equal length is substantially set between the lines DO and DO' on the same straight line. Thus the same stray capacity is obtained between both lines DO and DO'. |
