| 摘要 |
PURPOSE:To contrive to improve the integration degree of an IC device by performing the connection for the upper wiring from a gate electrode on a gate oxide film without varying the characteristic of an FET. CONSTITUTION:The poly Si gate electrode 26 is provided on the gate oxide film 25 on a P type Si substrate 21, and poly Si electrodes 28 are attached by penetrating connection holes from above the source 22 drain 23, and electrode 26 and via interlayer insulation film 27. The lead-out electrode 28 on the gate electrode 26 is formed shorter than said electrode 26 in the direction of the channel length. Since connection can be performed even from the gate electrode on the gate oxide film without generating characteristic variation by making the wiring connection part of the same material in such a manner, the connection of the gate electrode can be avoided on a field oxide film, and accordingly the integration degree of the IC can be easily improved. |
