发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain secure ohmic constant and prevent the formation of an inversion layer, without bringing the decrease in gate sensitivity and that in dv/dt characteristic, by a method wherein a P<+> type high concentration layer is formed in the surface of a semiconductor substrate, and the top of the impurity concentration is set inside by outer diffusion. CONSTITUTION:P type insulation isolation layers 22a and 22b are formed in the N type semiconductor substrate 21, and a P type anode diffused layer 24 and a P type gate diffused layer 25 are formed in the surface of the N type base region 23 of the substrate surrounded by the isolation layers. An N<+> type cathode diffused layer 26 is formed in the surface of the gate diffused layer, and a P<+> type high concentration layer 27 is formed on the surface of the substrate by the Ge sealed tube diffusing method. The impurity concentration N of the surface decreases with Ga release, and the top PN is set inside the surface of the layer 27. Accordingly, the decrease in gate sensitivity and that in dv/dt characteristics, etc. can be prevented without losing the ohmic contact property due to the formation of the layer 27 and the effect of preventing an inversion layer.
申请公布号 JPS60109277(A) 申请公布日期 1985.06.14
申请号 JP19830217266 申请日期 1983.11.18
申请人 TOSHIBA KK;TOUSHIBA COMPONENTS KK 发明人 SHIYOUMURA KATSUSHIGE;KATOU MINORU;FURUYA YOSHIHISA
分类号 H01L29/74;(IPC1-7):H01L29/74 主分类号 H01L29/74
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