| 摘要 |
PURPOSE:To attain high impedance output state and to decrease number of components by turning off an input stage C-MOSFET and an output stage C- MOSFET with a control signal together. CONSTITUTION:The control signal C is at an L level, a P-FETT5 is turned on and N-FETT6, T7 are turned off, the entire circuit is a circuit where no FETs T5-T7 are employed, and an output O goes to an H or L level depending on the levels H, L of an input signal D. When the input signal D goes to an H level conversely, the P-FETT5 is turned off and the N-FETT6, T7 are turned on, the gate of a P-FETT3 and an N-FETT4 goes respectively to H/L level and the FETs are both turned off and a high input impedance output state is obtained. The number of FET elements is decreased less than that of a conventional circuit so as to decrease the required area of the substrate of a semiconductor integrated circuit. |
