发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE:To set the load driving capabilities for output gates arbitrarily, by arranging a plurality of output gates in correspondence with the load driving capabilities in parallel by using a wiring area. CONSTITUTION:When the output signals and the like from an inner logic block 4 require load driving capabilities larger than the load driving capabilities of output gates 5a, a plurality of the output gates 5a are connected in parallel in correspondence with the required load driving capabilities by using a wiring region 7. By changing the number of the output gates 5a, which are connected in parallel, the load driving capabilities having arbitrary magnitudes can be set. The load driving capability per one output gate 5a can be small, and the area can be made small.
申请公布号 JPS60169150(A) 申请公布日期 1985.09.02
申请号 JP19840022810 申请日期 1984.02.13
申请人 HITACHI SEISAKUSHO KK 发明人 YOSHIDA YUKIYOSHI
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/118 主分类号 H01L21/822
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