发明名称 METHOD AND APPARATUS FOR INITIATING THE EXECUTION OF INSTRUCTIONS
摘要 <p>METHOD AND APPARATUS FOR INITIATING THE EXECUTION OF INSTRUCTIONS A method and a central execution pipeline unit for initiating the execution of instructions of a synchronous central processor unit (CPU) of a general-purpose digital data processing system. Instructions containing address information and an instruction field are obtained in program order from an instruction fetch unit of the CPU. In a first stage, requiring one clock period, the address information of an instruction is utilized to form the carrys and sums of an effective address and to initiate the formation of a virtual address. Concurrently, the instruction field is decoded to produce memory command signals and data alignment signals. In a second stage, the formation of the effective and virtual addresses initiated in the first stage is completed, and the word address portion of the virtual address is transmitted to the cache unit of the CPU. Also during the second stage, memory command signals are sent to the cache unit and the instruction field is converted to an execution code for one of a plurality of execution units, and the execution unit to execute the code is designated. In a third stage, the virtual address is converted to a physical address, or real page number which is transmitted to the cache unit. The execution code is sent to the designated execution unite; however, if the execution unit is the central unit, the execution code for that unit is converted into execution unit control signals. In the fourth stage, data alignment control signals are sent to a distributor of the central execution pipeline unit. The distributor will align the data in accordance with the alignment control signals. In the fifth stage, the addressed execution unit is enabled to receive the addressed operand or target word from the distributor, and the instruction field of the instruction is transmitted to the collector unit of the CPU. During the next stage, results of the execution of an instruction by the central execution unit are loaded into a results stack and indicator registers of the central execution pipeline unit are updated.</p>
申请公布号 CA1193741(A) 申请公布日期 1985.09.17
申请号 CA19830436171 申请日期 1983.09.07
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 WILHITE, JOHN E.;SHELLY, WILLIAM A.;GUENTHNER, RUSSELL W.;TRUBISKY, LEONARD G.;CIRCELLO, JOSEPH C.
分类号 G06F9/38;G06F12/08;(IPC1-7):G06F9/38 主分类号 G06F9/38
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