| 摘要 |
PURPOSE:To contrive the improvement in high withstand voltage characteristic by eliminating the heat runaway of an element by reduction in parasitic bi-polar effect by a method wherein at least a region containing generated recombination centers or a region whose band gap is winder than that of the semiconductor region in the periphery is formed in the base region of a parasitic bi-polar transistor. CONSTITUTION:A P type island 18 and an N type island 19 are provided in a supporting substrate 16 made of polycrystalline Si or the like via isolation film 17 composed of an insulation film or a semi-inuslation film. A P-channel DSA-structural MOS transistor 20 and an N-channel DSA-structural MOS transistor 21 are formed in these islands. The transistors 20 and 21 have drains 3, channels 4, sources 5, the insulation films 6 of gates, the insulation films 7 of fields, source electrodes 8, gate electrodes 9, drain electrodes 10, contact windows 11, and field plates 81 and 91; besides, consists of buried layers 22, etc. for reduction in so called back gate effect. Then, a region containing a large amount of generated recombination centers, region whose band gap is wider than that of the semiconductor region in the periphery, or region 23 having both these effects is formed in the channel 4 serving as the base of the parasitic bi-polar transistor. |
