| 摘要 |
A divider apparatus includes a divisor register for storing a divisor, a partial remainder register for storing a dividend or a partial remainder, a predictor for predicting a partial quotient, a multiplier for multiplying the content of the divisor register, and a first adder for subtracting the output of the multiplier from the content of the partial remainder register and for calculating the partial remainder. The divider apparatus further includes a second adder for determining the difference between the upper digits of the multiplier and the upper digits of the partial remainder register, a first predictor for predicting the partial quotient from the output of the first adder and the upper digits of the divisor register, a second predictor for predicting the partial quotient in the third cycle from a corrected output of the second adder and the digits of the divisor register, a carry predictor for determining the carry to be propagated to the second adder from remaining digits of the multiplier and remaining digits of the partial remainder register, and a selector for selecting one of outputs of the first predicting circuit and the second predictor in dependence upon the output of the carry predictor. |
