发明名称 NONVOLATILE SEMICONDUCTOR MEMORY POSSIBLE FOR ELECTRIC WRITE/ERASE
摘要 PURPOSE:To attain screening only with simple mode setting by providing a high voltage generating circuit generating a high voltage and a voltage lower than the high voltage used for normal write/erase and writing/erasing all memory cells at the same time. CONSTITUTION:A high voltage negerating circuit consists of a boosting circuit 1 whose input is connected to a single power supply VCC and limiters A2, B3 limiting an output VPP of the boosting circuit 1 to a prescribed voltage. The limiter A2 limits a voltage of the output VPP to the 1st high voltage (hereinafter high voltage 1) used for normal write/erase and the limiter B3 limits the voltage of the output VPP to a high voltage lower than (hereinafter high voltage 2) the high voltage 1. Further, the limiter B3 is activated only when a control signal T1 is at high level and inoperative when the control signal T1 is at low level. Thus, the high voltage 1 is outputted as the output VPP when the control signal T1 is at low level and the high voltage 2 is outputted when the control signal T1 is at high level.
申请公布号 JPS60247899(A) 申请公布日期 1985.12.07
申请号 JP19840102871 申请日期 1984.05.22
申请人 NIPPON DENKI KK 发明人 KANEUCHI SHIYUUJI;MIYATA SHINOBU
分类号 G11C29/00;G11C16/06;G11C17/00;G11C29/06 主分类号 G11C29/00
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