发明名称 DISTURBANCE MONITOR FOR DIGITAL SIGNAL PROCESSOR
摘要 PURPOSE:To enable a constant monitoring by extracting and storing input/output data into first and second memories to obtain the results of disturbance monitoring at the output of a means for comparing the results with a simulation processor and the output data. CONSTITUTION:A necessary data from an input signal line IL is extracted with a simulation processor 8 to be stored into a first memory 6 and a data processed with a digital signal processor 1 based on the data is extracted from an output signal line OL to be stored into a second memory 7. Then, the data of the first memory 6 is simulated with the processor 8 and the stored data controlled in the output action of the second memory 7 is compared with the results of simulation by a comparator 3. When both of the data coincide with each other, the unit 1 is reset while when they do not, an alarm is lighted judging that some disturbance occurs while a terminal 5 is notified thereof. This enables constant monitoring without interruption of the unit 1.
申请公布号 JPS60262073(A) 申请公布日期 1985.12.25
申请号 JP19840118105 申请日期 1984.06.11
申请人 FUJITSU KK 发明人 KAJIWARA MASANORI;TANAKA TAKESHI;NAKADE HIROSHI
分类号 G01R31/28;H03H17/00;H03H17/02 主分类号 G01R31/28
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