发明名称 REFERENCE VOLTAGE GENERATING CIRCUIT
摘要 PURPOSE:To generate an extremely stable constant voltage as a reference voltage by providing negative feedback to an FET connected in series with the 1st and the 2nd FETs and positive feedback to an FET connected to the 1st FET in series. CONSTITUTION:A Q12 is provided in series between the drain side of an MOSFETQ11 and Q13. This Q12 constitutes a negative feedback loop which stabilizes an operating current I1 flowing through the Q13 together with a Q16. Namely, the gate of the Q16 is connected to the source side of the Q12 to detect variation of the current I1, and its drain output is fed back negatively to the gate of the Q12. Further, a Q14 is provided between the source of the Q12 and a ground point. Namely, the Q14 and Q18 constitute a current mirror circuit and a current obtained at the drain of the Q18 is fed back positively to the side of the Q21 for generating the reference voltage Vref. Namely, the operating current I2 of a Q12 is increased as the current I1 increases. Consequently, the currents I1 and I2 are equal to each other. Thus, the extremely stable reference voltage is obtained.
申请公布号 JPS6146507(A) 申请公布日期 1986.03.06
申请号 JP19840167819 申请日期 1984.08.13
申请人 HITACHI LTD 发明人 KOKUBO MASARU;SUGINO KIMIHIRO
分类号 G05F1/56;G05F3/24 主分类号 G05F1/56
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