发明名称 ARITHMETIC UNIT
摘要 PURPOSE:To improve a processing capability by accumulating the number of input/output (I/O) processing for each task and allocating an optimum processor when the task concerned is activated next time according to the total number of data I/O processing and its number of times. CONSTITUTION:A counter 9 is connected to the BUS3 of a CPU1, which is a multi-counter for the product of the total number of tasks and systems. A counter 49 is also connected to the local BUS43 of an I/O channel 41. The I/O device which is used the most by the counter concerned is determined to the counter 9. The counter 49 counts the number of tasks for the I/O device concerned, and the number of tasks for the I/O channel which includes the counter having the maximum value is sent to the counter 9 to add the number of tasks for determining the I/O channel to the task concerned.
申请公布号 JPS6152761(A) 申请公布日期 1986.03.15
申请号 JP19840173301 申请日期 1984.08.22
申请人 HITACHI LTD 发明人 SAKAMAKI TSUTOMU
分类号 G06F13/14;G06F9/46;G06F15/16;G06F15/177 主分类号 G06F13/14
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