发明名称 MODE SETTING SYSTEM OF ONE-CHIP MICROCOMPUTER
摘要 <p>PURPOSE:To eliminate the need for a CR time constant circuit element which is used conventionally by placing a gate in a mode setting state corresponding to the supply of a reset signal and putting it in normal operation with a signal from an input/output terminal at the end of the supply. CONSTITUTION:An input/output port terminal P10 of a one-chip microcomputer 1 is held at a low level in normal operation and the gate signal to a terminal S of the gate 2 is at a high level, so that the gate 2 is placed in normal operation. When the reset signal is supplied, the input/output port terminal P10 is held at the high level and the gate signal to the terminal S of the gate 2 goes down to the low level, so that signals X, Y, and Z of input/output port terminals P20, P21, and P22 have signal level of signals X0, Y0, and Z0. When the reset signal is supplied, the input/output pore terminal P10 is held at the high level by the program of the one-chip microcomputer, so that the computer enters the normal operation state.</p>
申请公布号 JPS61147362(A) 申请公布日期 1986.07.05
申请号 JP19840269468 申请日期 1984.12.20
申请人 FUJITSU LTD 发明人 IIDA YOICHI
分类号 G06F15/78 主分类号 G06F15/78
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