发明名称 INTERRUPTION PROCESSING SYSTEM
摘要 PURPOSE:To shorten an interruption prohibiting time by executing the pre- processing part only by the processing device when the interruption occurs, describing the information necessary for the after-processing to an FIFO register and thereafter, executing the after-processing part when the interruption prohibiting condition is released. CONSTITUTION:A processing part 1-1 divides the interruption information inputted into the pre-processing part related directly to the external interruption and necessary to execute in the interruption prohibiting condition, and the after-processing part except it. A processing part 11 executes the pre-processing part only when the interruption occurs, the information necessary to the after- processing part is described in an FIFO register 1-9, and after the multiple interruption is cancelled at the time of dispatching, the interruption prohibition is released by lowering the interruption level to the level of the task, and by reading the information from the register 1-9, the after-processing part is executed.
申请公布号 JPS61184642(A) 申请公布日期 1986.08.18
申请号 JP19850024625 申请日期 1985.02.12
申请人 HITACHI LTD 发明人 MAEDA TAKAO;TSUTSUI SHIGECHIKA;SUGITA YUMIKO;YAMAKI KAZUSHI
分类号 G06F9/48;G06F9/46 主分类号 G06F9/48
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