发明名称 ARITHMETIC SYSTEM USING MULTIPLE-BIT INPUT OF ARITHMETIC ELEMENT
摘要 PURPOSE:To utilize effectively multiple-bit arithmetic element when making calculation of multiple-bit and few-bit by calculating multiple-bit input using multiple-bit input arithmetic element, and at the same time, by calculating in case of few-bit input in parallel and independently. CONSTITUTION:Multiple-bit inputs A and B consisting of maximum N-bit is calculated by a multiple bit input arithmetic element LBCD and its arithmetic output C is outputted. In operating system using the arithmetic element LBCD, (m) sets of input pairs a0, a1, and a1, b2 ... am-1, bm-1 calculated independent to each other are made to input pairs that satisfies the equation when maximum bit for an input pair a1, b2 is made P1. Inputting is made providing at least space of 1 bit between input terminals A0-AN-1 and B0-BN-1 to which input A and input B of the arithmetic element LBCD are applied. Arithmetic in case of small input is made in parallel and independently, and the arithmetic element LBCD is utilized effectively in case of multiple-bit and few-bit.
申请公布号 JPS61224037(A) 申请公布日期 1986.10.04
申请号 JP19850065664 申请日期 1985.03.29
申请人 FUJITSU LTD 发明人 MAKI SHINICHI;MATSUDA KIICHI;HONMA TOSHIHIRO;FUKUDA YUTAKA;OKAZAKI TAKESHI;ITO TAKASHI;KAWAI OSAMU;TSUDA TOSHITAKA
分类号 G06F7/505;G06F7/50 主分类号 G06F7/505
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