| 摘要 |
<p>PURPOSE:To recognize sufficiently information as an easy-to-see black/white picture by detecting whether or not each point at the pre-stage and post-stage of an HD waveform is within a fluctuation width provided in a specified level and outputting a zero output from a succeeding selector to a chrominance processing circuit when even one point is at the outside of the range to make a color signal zero. CONSTITUTION:A digital signal 101 being an output of an A/D converter 1 is led to a synchronizing separation/clock recovery system. A frame pulse detection circuit 3 generates a frame pulse 301 and a HD detection section 4 inputs the digital signal 101 and the frame pulse 301 to generate a HD pulse (horizontal synchronizing pulse) 401 and an error flag signal 402. The HD pulse 401 is inputted to a PLL circuit 5, which recovers a system clock synchronously with the HD pulse 401. The error flag signal 402 changes over the conduction of the position A of selectors 7a, 7b connected to a chrominance processing circuit 6 and the zero output of the position B.</p> |
