| 摘要 |
PURPOSE:To attain rapid data transfer between memories by using a direct memory access (DMA) controller, and transferring the data corresponding to the number of data indicated by a length register to an internal memory. CONSTITUTION:When data are written from an external I/O device 13 in a high speed memory 7, an interruption signal is generated to an interruption controller 3. An internal CPU 1 reads out the number of data written in the memory 7 from the length register 12 and switches a bus switching circuit 11 to the internal CPU 1 side. Data stored in the memory 7 are read on the basis of an address indicated by a counter 6 and temporarily stored in a data register 8. The data are written in the internal memory 2 by the DMA controller 10. Consequently, the contents of the counter is added and the data are read out again from the succeeding address of the memory 7, and finally the number of data indicated by the length register 12 can be transferred.
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