发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To secure the stability of a semiconductor integrated circuit at the time of negative feedback, by providing a serial circuit of a capacity and resistance in parallel with an earthing point at the signal point between the next- stage amplifier having a high-output resistance and an output buffer having a high-input impedance. CONSTITUTION:A serial circuit of a capacity 4 for phase compensation and resistance 5 for phase compensation is connected in parallel between the signal point 9 between the next stage amplifier 2 and output buffer 3 and earthing point 10. From the pole of a transfer function which is determined by the time constant between the capacity and resistance shunted from the high-output resistance of the amplifier 12, a gain damping characteristic of -6dB/Oct and phase delaying characteristic are obtained. In addition, a phase advancing characteristic is obtained at the zero point on the left-half plane of the transfer function determined by the time constant between the shunted capacity and resistance and the phase delaying quantity in the vicinity of a unit gain frequency is extremely improved. Therefore, high stability can be maintained even when the negative feedback quantity to be added to an operational amplifier is increased.
申请公布号 JPS62143507(A) 申请公布日期 1987.06.26
申请号 JP19850284913 申请日期 1985.12.18
申请人 MATSUSHITA ELECTRONICS CORP 发明人 KATSU SHINICHI;KAZUMURA MASARU
分类号 H03F1/08;H03F1/34;H03F3/34 主分类号 H03F1/08
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