发明名称 ARITHMETIC CIRCUIT
摘要 PURPOSE:To attain an efficient arithmetic processing by adding a function which divides plural arithmetic I/O ports and operates them as an independent arithmetic I/O port. CONSTITUTION:Only when an control signal Co becomes active, an arithmetic circuit 1 operates: otherwise, the input ports X0-X7, Y0-Y7 and the output ports Po-PF are fixed in high impedance states to vacate data buses 2 and 3. Such a function that the arithmetic input ports X0-X7 and Y0-Y7 and the arithmetic output ports Po-PF are independently bisected, and the bisected ports X10-X13, Y10-Y13, X20-X23, Y20-Y23, P10-P17 and P20-P27 are independently operated by the groups is given to the arithmetic circuit 1. namely, the 1st and 2nd action modes are given to said circuit 1, and the selecting operation of the mode is executed by a control signal C1 given from the outside selects the modes.
申请公布号 JPS62154028(A) 申请公布日期 1987.07.09
申请号 JP19850292704 申请日期 1985.12.27
申请人 HITACHI LTD;HITACHI TOBU SEMICONDUCTOR LTD 发明人 WATANABE KAZUO;SHIMAZU KATSUHIRO
分类号 G06F7/00;G06F7/38;G06F7/52 主分类号 G06F7/00
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