| 摘要 |
PURPOSE:To constitute economically an instruction executing mechanism by using a pipe line type floating point adding mechanism to constitute the instruction executing mechanism for detecting the position of the most significant (MS) '1' or '0' bit of data. CONSTITUTION:When data to be operated are set up from a vector register to a register 11 at the execution of a reading zero instruction, respective bit values of the data to be operated by an inversion circuit 60 are inverted at the detection of the MS '0' bit in accordance with the instruction or the original data are set up as they are at the detection of the MS '1' bit. The operated result of a one-element data of a vector based on the reading zero instruction is completed in a register 32 and the contents of the register 32 are passed through the 8th and 9th stages as they are and stored in a vector register. Consequently, the reading zero instruction executing mechanism can be obtained by the economical constitution obtained by adding only several circuits to the addition pipe line of a vector processor.
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