发明名称 MEMORY CONTROL CIRCUIT
摘要 PURPOSE:To convert components RGB into components YMC without using a main controller by reading and inverting data that is dividingly stored in at least two areas in a memory in the prescribed order and dividingly storing said data in the prescribed area in the memory. CONSTITUTION:An address outputs a bank #1, and fetches a data Y in a data storage register 410. Then the address outputs a bank #2 and stores a data M in a data storage register 411. Due to the inner action of a memory control circuit 4, an AND circuit 418 takes the AND between the registers 410 and 411 and fetches data on the AND in the register 411. Then a bank #3 is outputted to fetch in the register 410. Next the same action as before is made, and as a result Y*M*C, that is, a data Bk remains in the register 411. Then a bank #4 is outputted and written in the memory. To prepare for generating new data Y, M and C the data Bk is inverted and rewritten in the register 411.
申请公布号 JPS62217772(A) 申请公布日期 1987.09.25
申请号 JP19860059309 申请日期 1986.03.19
申请人 CANON INC 发明人 SAKAGAMI WATARU
分类号 H04N1/21;B41J2/525;B41J3/00;G06F12/00;G06F12/04;G06F13/28 主分类号 H04N1/21
代理机构 代理人
主权项
地址