发明名称 ENGINE IDLE STABILIZATION TIMING CIRCUIT
摘要 A timing circuit is provided for stabilizing idling of an internal combustion engine, particularly marine racing applications where idle speed must be reduced to enable gear engagement, notwithstanding the use of a racing cam otherwise requiring higher idling speed. Delay means (8) provides a radical reduction in spark timing along a negative slope (16) relative to a baseline curve (6) up to a predetermined speed such as 900 rpm at which there is maximum relative timing delay (18). As speed increases in this range, there is more retard because of the negative slope, which further retarded timing slows engine speed, hence providing self-stabilization. As engine speed decreases in such range, there is less retard, and the advanced timing increases engine speed, again providing self-stabilization. At engine speed increases above the predetermined speed such as 900 rpm, there is a rapid advance in timing along a steeper positive slope (20) to merge with the baseline curve (6). Cranking and warm-up control circuitry (12) and acceleration detection circuitry (14) are also provided for eliminating or reducing the relative timing delay under conditions where maximum spark advance is desired.
申请公布号 AU7433387(A) 申请公布日期 1987.12.22
申请号 AU19870074333 申请日期 1987.05.18
申请人 BRUNSWICK CORP., 发明人 RICHARD E. STAERZL
分类号 F02P5/155 主分类号 F02P5/155
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