发明名称
摘要 PURPOSE:To shorten a bus occupation time, by providing a means or the like where data from the external is stored in accordance with plural input/output controllers to perform the direct memory access transfer in a high-speed access time. CONSTITUTION:The data storage means or the like is provided which has plural storage positions and stores data from the external in accordance with plural input/output controllers. For example, a buffer controller 100 is connected between a common bus 101 of the interlock cycle operation and an interface 301 of a main storage device 300 of the split cycle operation, and the main storage device 300 is connected to a central processing unit 200 and another data processor 400 through interfaces 201 and 401. Input/output controllers 500, 600, and 700 are connected to the common bus 101, and peripheral control parts 510, 520, 530, and 540 are connected to the input/output controller 500. Peripheral devices 511, 521, 531, and 541 are controlled by peripheral control parts 510-540.
申请公布号 JPS63831(B2) 申请公布日期 1988.01.08
申请号 JP19830013310 申请日期 1983.01.28
申请人 NIPPON ELECTRIC CO 发明人 MAEDA KENICHI
分类号 G06F13/28;G06F3/00;G06F13/36;G06F13/38 主分类号 G06F13/28
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