发明名称 |
Resistance switching device and process for producing thereof |
摘要 |
A resistance switching device having a high resistance variation ratio, an excellent response characteristic, an excellent resistance memory characteristic (retention characteristics) and an excellent repeat resistance. The resistance switching device comprises an n-type oxide semiconductor and first and second electrodes which are disposed so as to interpose at least a part of the n-type oxide semiconductor therebetween wherein a Schottky junction which provides resistance variation/memory characteristics by the application of voltage having different polarities between the first and second electrodes is formed at an interface between the n-type oxide semiconductor and the first electrode; and the first electrode is positioned such that it is in contact with the n-type oxide semiconductor, and has a lower layer which is formed from Au oxide or a Pt oxide or Au or Pt containing oxygen having the thickness of 1-50 nm. |
申请公布号 |
US9496492(B2) |
申请公布日期 |
2016.11.15 |
申请号 |
US201414458808 |
申请日期 |
2014.08.13 |
申请人 |
MURATA MANUFACTURING CO., LTD.;NATIONAL INSTITUTE FOR MATERIALS SCIENCE |
发明人 |
Hirose Sakyo;Ohashi Naoki;Yoshikawa Hideki |
分类号 |
H01L47/00;H01L45/00;H01L29/47;H01L29/872;H01L29/861;H01L29/24 |
主分类号 |
H01L47/00 |
代理机构 |
Arent Fox LLP |
代理人 |
Arent Fox LLP |
主权项 |
1. A resistance switching device comprising:
an n-type oxide semiconductor selected from the group consisting of titanium oxide (TiO2),(strontium titanate (SrTiO3), barium titanate (BaTiO3), and a solid solution thereof; a first electrode disposed on a first surface of the n-type oxide semiconductor; a second electrode disposed on a second surface of the n-type oxide semiconductor such that the n-type oxide semiconductor is interposed between the first and second electrodes; and a Schottky junction formed at an interface between a portion of the first electrode and the n-type oxide semiconductor, the portion of the first electrode comprising a platinum containing oxygen layer which abuts the n-type semiconductor, the Schottky junction having resistance variation memory characteristics when a voltage with different polarities is applied between the first and second electrodes. |
地址 |
Nagaokakyo-Shi, Kyoto-Fu JP |