发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To shorten a production process by a method wherein, at the selective formation of an N-type electric-conductive region and a P-type electric- conductive region, two lithographic processes which were requied by a conventional system can be reduced to only one process by making use of a lift-off method of a metal film. CONSTITUTION:A P-type electric-conductive layer 2, an N-type electric-- conductive layer 3, a field insulating film 4, a gate insulating film 5, a polycrystalline silicon layer 6 and a photoresist layer 7 are formed on one main surface of a substrate 1. Then, poly-crystalline silicon layers 8, 9 acting as electrodes are formed by making use of the photoresist layer 7 as a mask. After thermal oxidation, an insulating film 10 is formed. Then, after a photoresist material has been coated, photoresist makes 11-1, 11-2 are formed, by photolithography, on parts where regions are to be formed. A source region, a drain region 12-2, 12-3 and an electrode terminal region 12-1 are formed by implanting high-concentration ions. Then, metal layers 18-1, 18-2 are formed uniformly on the main surface of the substrate 1 by a sputtering method. Then, the photoresist films 11-1, 11-2 and the metal layer 18-2 on the photoresist film are removed (lifted off).
申请公布号 JPS63133564(A) 申请公布日期 1988.06.06
申请号 JP19860281106 申请日期 1986.11.25
申请人 NEC CORP 发明人 WATANABE TOKUJIRO
分类号 H01L21/265;H01L21/8238;H01L27/092 主分类号 H01L21/265
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