发明名称 SELECTIVE OXIDATION ISOLATING METHOD
摘要 PURPOSE:To prevent the narrowing of the effective channel width of an MOS transistor even when the width of an active region is 1mum or less by a method wherein, after the side face of a groove and an active region have been coated with a silicon nitride film, a polycrystalline silicon layer is buried contacting to the exposed surface of a substrate on the bottom part of the groove, and said layer is oxidized. CONSTITUTION:A thermally oxided film 12 and the first silicon nitride film 13 are grown on a substrate 11, the region which becomes a field region is etched, a groove is formed in the substrate 11, and the impurities having the conductive type same as the substrate 11 are ion-implanted. Then, after the second silicon nitride film has been grown on the substrate 11, the second silicon nitride film 15 is left on the side face only of the groove by performing anisotropic etching, a polycrystalline film 16 is grown on the substrate 11, and photoresist 17 is thickly coated thereon. Then, the photoresist 17 and the polycrystalline silicon film 16 are anisotropically etched, and a flat polycrystalline silicon film 16' is left in the groove only of the substrate 11. Then, the whole surface of the substrate 11 is thermally oxided, and the polycrystalline silicon film 16' in the groove is oxided.
申请公布号 JPS63153840(A) 申请公布日期 1988.06.27
申请号 JP19860302521 申请日期 1986.12.17
申请人 NEC CORP 发明人 KUWATA TAKAAKI
分类号 H01L21/76 主分类号 H01L21/76
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