发明名称
摘要 PURPOSE:To control efficiently a channel buffer by identifying the kind of a channel on the way of accessing a memory and controlling the channel buffer. CONSTITUTION:A main storage control part 4 incorporates the channel buffer 41. The interface from a channel processor 3 to the main storage control part 4 is provided with a flag. The main storage part 4 recognizes this flag to identify the kind of a channel which attains to memory access, and laters the control over the channel buffer 41. When memory access is attained from a multiplexer channel, that is registered in the channel buffer 41 regardless of whether the access is fetch or store to inhibit writing operation.
申请公布号 JPS6334496(B2) 申请公布日期 1988.07.11
申请号 JP19830166910 申请日期 1983.09.10
申请人 FUJITSU LTD 发明人 KURIBAYASHI NOBUHIKO;CHIBA TAKASHI
分类号 G06F12/08;G06F13/12 主分类号 G06F12/08
代理机构 代理人
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