| 摘要 |
PURPOSE:To increase the storage capacity of an associative memory part without expanding a priority encoder by providing the titled device with sequence logic circuits selectively accessing all memory areas by regarding the associative memory part as the collection of several memory areas and individually operating correspondingly to respective memory areas. CONSTITUTION:The titled device includes the associative memory means 120 consisting of plural memory areas to store plural pattern code strings independently in respective areas, the sequence logic means 130 selectively controlled by reading signals from respective memory areas in the means 120, an area selecting means 150 for the means 120, a shift clock generating means 160 for operating only the sequence logic means corresponding to the selected memory area, and an encoding means 140 for identifying the processed result of the means 130. Since the means 120 is constituted of several memory areas to execute matching processing, the registering capacity of the pattern code strings can be increased without increasing the area of the means 140.
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