DATA TRANSMISSION SYSTEM FOR COMMUNICATION CONTROL EQUIPMENT

摘要

PURPOSE:To prevent wrong data from being transmitted by invalidating the wrong sent data and outputting a mark signal if abnormality occurs to data and a data transfer procedure during the transmission of data transfer by a direct memory access system. CONSTITUTION:When an error occurs, the output (signal line 17) of a holding circuit 6 is '1', so an OR circuit 8 invalidates the wrong sent data from a serial output line 14 forcibly and outputs the mark signal ('1'). This is idle and indicates the abandonment of the right to send, and a reception-side device handles the frame as an ineffective frame. Consequently, even if an error occurs in the write cycle of the writing of data read out of a storage part MEM 2 to a parallel resister CR 23a, the erroneous data can not be outputted linealy to a communication line because of a holding circuit 6 which holds the signal indicating the error occurrence and an OR circuit 8 which places the sent data forcibly in a '1' state (IDLE state) with the output signal of the circuit 6.