| 摘要 |
PURPOSE:To register many pattern symbol strings into a single chip by applying a memory area selecting means to that only a memory part is increased without increasing an order logic part. CONSTITUTION:The symbol codes inputted through an input terminal 101 are inputted to a memory area 120-1 designated by the selection address code given from an input terminal 102 via a memory area selection means 110 and compared with those symbol codes registered there. The results of these comparisons are totally given to an order logic part 130 as the read output signals of the area 120-1. The part 130 performs a high-degree collation process of symbol strings by means of many read output signals inputted in parallel. As a result, the matched pulses are outputted through an output terminal 139 when a data symbol train matching either one of registered pattern symbol string is inputted from the terminal 101. Then the register address of the matching pattern symbol train is outputted through an output terminal 149 of a priority encoding means 140 with output of matched pulses.
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