发明名称 SIGNAL DISCRIMINATION CIRCUIT
摘要 PURPOSE:To prevent erroneous discrimination due to noise by providing a counter counting pulses which are generated when a counter counting the pulses generated in accordance with identification signals executes a prescribed counting. CONSTITUTION:The stereo pilot signal of 19kHz is inputted to an input terminal 9, is frequency divided in a frequency-dividing circuit 10, which generates the clock signal of 1.2kHz and outputs it to the counter 15. A frequency-dividing circuit 11 simultaneously frequency divides the signal and outputs the clock signal of 74Hz to the counter 15. The identification signal inputted to an input terminal 12 is inputted to a pulse generation circuit 14 through a BPF13 and the pulses are inputted to the counter 15 and counting starts. If the discrete value becomes 40, an output signal is generated and an FF16 is set. On the other hand, the output signal of the circuit 14 is inputted to the FF16 through an inverter 20 and the FF16 is reset. A frequency dividing circuit 17 frequency divides the output signal of the FF16 so as to input it to the counter 18. The counter 18 counts a period when a frequency-dividing output signal becomes H, and a detection circuit 19 compares the discrete value so as to decide the presence of the identification signal.
申请公布号 JPS63302633(A) 申请公布日期 1988.12.09
申请号 JP19870139239 申请日期 1987.06.03
申请人 SANYO ELECTRIC CO LTD 发明人 TANNO MASAYA
分类号 H03K5/26;H03K5/01;H03K5/1254;H04H40/45 主分类号 H03K5/26
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