发明名称 ELECTRONIC APPARATUS AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM
摘要 Provided is an electronic apparatus including: a processor including a plurality of cores that divisionally execute a plurality of tasks; a total task amount calculation circuit that calculates, for each of the cores, a total task amount as a total processing amount of the plurality of tasks to be executed; a sleep shift processing circuit that causes one of the plurality of cores to shift to a sleep mode based on the total task amount calculated for each of the cores;;and a sleep recovery processing circuit that causes, when the one of the cores is in the sleep mode, the core in the sleep mode to recover from the sleep mode based on the total task amount.
申请公布号 US2016378164(A1) 申请公布日期 2016.12.29
申请号 US201615171382 申请日期 2016.06.02
申请人 KYOCERA DOCUMENT SOLUTIONS INC. 发明人 TSUJI SHUNTARO
分类号 G06F1/32;G06F9/48;G06F9/44 主分类号 G06F1/32
代理机构 代理人
主权项 1. An electronic apparatus, comprising: a processor including a plurality of cores that divisionally execute each of a plurality of tasks; a total task amount calculation circuit that calculates, for each of the cores, a total task amount as a total processing amount of the plurality of tasks to be executed; a sleep shift processing circuit that causes a part of the plurality of cores to shift to a sleep mode based on the total task amount calculated for each of the cores; and a sleep recovery processing circuit that causes, when the one of the cores is in the sleep mode, the core in the sleep mode to recover from the sleep mode based on the total task amount.
地址 Osaka JP