| 摘要 |
<p>PURPOSE:To decrease the generation of erroneous writing and a malfunction by making at least one of plural transistors (TRs) into a depletion type TR, and controlling a potential impressed to the gate of a memory element. CONSTITUTION:A write voltage VPP and read voltage VCC are respectively supplied to drain side nodes 4 and 5 of depletion type TRs 6 and 7, a gate voltage is supplied to a gate node 2 of the TR 6 at the time of writing, a gate node 3 of the TR 7 is grounded, and the sources of the TRs 6 and 7 are commonly grounded to a node 1. In a read mode, the voltage obtained by subtracting the threshold voltage of the TR 7 from the gate voltage of the TR 7 is supplied to the node 1. Consequently, in the read mode, the constant voltage is supplied to the gate of the memory element connected to the tip of the node 1 regardless of the fluctuation of the read voltage VCC. Thus, a storage device having the small level of the erroneous writing and malfunction can be obtained.</p> |
