| 摘要 |
PURPOSE:To remarkably shorten lock time after recovering drop out by providing a drop out detector, an oscillator to output prescribed data, and a switching means to switch the input of a PLL circuit. CONSTITUTION:When the drop out of a reproducing signal occurs, the drop out detector 4 detecting the drop out is operated, and the switching means 6 is switched from the connection side of a pulse detector 1 to that of the oscillator 5. Thereby, data consisting of a binary signal with the same frequency as the highest frequency in reproducing data is inputted to the PLL circuit 2 from the oscillator 5. Therefore, a reproducing clock outputted from the circuit 2 is corrected so as to synchronize its phase with the output of the oscillator 5, however, the frequency is kept as a normal frequency. When the drop out is recovered, the means 6 is switched again, and the output of the detector 1 i.e. the reproducing data is immediately inputted to the circuit 2. However, since the frequency of the reproducing clock is kept at a normal level, it is enough to correct only a phase error at the circuit 2, thereby, a synchronized reproducing signal can be obtained in a short time. |
