| 摘要 |
PURPOSE:To eliminate a phase deviation between a positive and a negative signal generating circuits by connecting a buffer in parallel with the positive phase having a delay of operating time more than the negative phase in the positive and negative signal generating circuit generating a positive and a negative signal used for control signals of a CMOS analog switch. CONSTITUTION:An inverting phase output means is an inverter and gives an inverted output signal to an input signal from an input terminal 2 to an output terminal 3. Noninverting output means 4a, 4b are two inverters connected in series and give a noninverting output signal with respect to the input signal from the input terminal 2 to the output terminal 5. Then one buffer 6 is connected in parallel with the noninverting output means. Thus, the positive and negative signal generating circuit whose phase deviation is improved is obtained. |
