发明名称 LEAD FRAME FOR SEMICONDUCTOR DEVICE
摘要 PURPOSE:To reduce setting irregularity between operators at the time of initializing of a die bonding position of a semiconductor element by attaching a mark on the surface of a lead frame island. CONSTITUTION:Six partial linear marks 7 for positioning bonding of a semiconductor element parallel to the sides are attached at an equal internal from the four peripheral ends of an island 1. When a semiconductor element 11 is bonded to the island 1, the element 11 is so positioned that the peripheral edges are observed with the same number of mark lines 7 from the peripheral edge of the island 1 to be accurately positioned at the center of the island 1 and die bonded. Thus, if the size of the element is extremely smaller than the size of the island of a lead frame, an irregularity in visual observation by operators can be reduced at the initializing of the die bonding position.
申请公布号 JPH02253649(A) 申请公布日期 1990.10.12
申请号 JP19890075387 申请日期 1989.03.27
申请人 NEC KYUSHU LTD 发明人 GOTO SEIJI
分类号 H01L21/52;H01L23/50 主分类号 H01L21/52
代理机构 代理人
主权项
地址
您可能感兴趣的专利