| 摘要 |
PURPOSE:To simply perform the simulation for confirmation of the working of an instruction given from a CPU of a higher rank or the like by securing the connection among a pseudo processor, a memory which stores the result of simulation, and a microprocessor via the buses for execution of simulation. CONSTITUTION:A pseudo processor circuit 1 reads an instruction out a memory 1a storing a program to control a pseudo processor concurrently with the start of simulation and decodes/executes the instruction to produce a bus timing signal. This timing signal is sent to a pseudo processor bus 3. A microprocessor 5 receives the bus timing signal via the bus 3 and reads the programs out of a program storing memory 7a connected to the microprocessor 5 via a bus and executes those programs in sequence via a microprocessor bus 6. Then a program is described into the read-out program in order to actuate a peripheral circuit 7 connected to the bus 6. Thus the circuit 7 is simulated. As a result, the simulation is facilitated for confirmation of execution of instructions given from a CPU of a higher rank or the like. |
