发明名称 PLANAR TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To make a semiconductor device of this design resistible to a high bias by a method wherein an insulating layer interposed between a field palate and a semiconductor substrate is formed thicker near the edge of the substrate than near a second conductivity type region. CONSTITUTION:Insulating layer 32 and 33 interposed between a field plate 5 and a semiconductor substrate 2 are formed thicker near the edge 13 of a substrate than near a second conductivity type region 4. Therefore, a capacitor of larger capacity is formed at a part where the field plate 5 is opposed to the semiconductor substrate 2 through the intermediary of a thin insulating layer 31, and a depletion layer 6 induced in the semiconductor substrate 2 just under the part concerned is large in thickness. On the contrary, a capacitor of small capacity is formed at a part where the field plate 5 is opposed to the semiconductor substrate 2 through the intermediary of the thick layers 32 and 33, and the depletion layer 6 induced in the semiconductor substrate 2 under the part concerned is small in thickness. Therefore, the depletion layer 6 becomes gradually smaller in thickness as receding from the second conductivity type region 4 toward the edge 13 of the semiconductor substrate 2, so that the depletion layer 6 extends smoothly toward the edge 13. By this setup, a semiconductor device of this design can withstand a high reverse bias.
申请公布号 JPH03116976(A) 申请公布日期 1991.05.17
申请号 JP19890254695 申请日期 1989.09.29
申请人 FUJI ELECTRIC CO LTD 发明人 MOMOTA MASAJI
分类号 H01L29/41;H01L29/06;H01L29/66;H01L29/78 主分类号 H01L29/41
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