Semiconductor memory.

摘要

An improved semiconductor memory which comprises a plurality of sense amplifier circuits (10) provided corresponding to each bit line (S1) of a plurality of columns, a first common line (SAN) which is connected in common to the sense amplifier circuits, a second common line which is connected to the first common line, a first switching element (Qsan) which is connected between the second common line and a reference voltage potential terminal and a second switching element (Qn2) which is connected to the first common line and the reference voltage potential, the second switching element corresponding to the first common line connected to one of the sense amplifier circuits being made conductive in response to selection of the sense amplifier is disclosed. <IMAGE>