| 摘要 |
PURPOSE:To contrive to reduce the use area of a logical element or the like in the case the logical element or the like is formed of FETs by a method wherein a plurality of gate electrodes are formed on the outer periphery of a pillar-shaped body in the peripheral direction of the pillar-shaped body. CONSTITUTION:In a pillar-shaped body 4 with a straight line linking a source region 6 with a drain source 7 as an axis, a channel region is formed and a plurality of gate electrodes G1 to G4 are formed on the outer periphery of the body 4 in the peripheral direction of the body 4. These electrodes G1 to G4 are independently controlled, whereby channels can be independently formed on parts, which oppose to these electrodes G1 to G4, of the outer peripheral surface of the body 4. Thereby, field-effect transistors (FETs) of the number identical with the number of pieces of the electrodes G1 to G4 can be formed on the single body 4. The use area of a logical element or the like can be reduced by constituting the logical element or the like using the plurality of FETs formed on the single body 4 in such a way.
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