发明名称 3-dimensional non-volatile memory device and method of manufacturing the same
摘要 A non-volatile memory device comprising a plurality of strings each including a drain select transistor, drain-side memory cells, a pipe transistor, source-side memory cells, and a source select transistor coupled in series, wherein the plurality of strings are arranged in a first direction and a second direction, and the strings arranged in the second direction form each of string columns; a plurality of bit lines extended in the second direction and coupled to the drain select transistors of the strings included in each string column; and a plurality of source lines extended in the first direction and in common coupled to the source select transistors of strings adjacent to each other in the second direction, wherein strings included in one of the string columns are staggered in the first direction and each of the string columns are coupled to at least two of the bit lines.
申请公布号 US9508836(B2) 申请公布日期 2016.11.29
申请号 US201514618802 申请日期 2015.02.10
申请人 SK Hynix Inc. 发明人 Choi Eun Seok
分类号 H01L27/115;H01L29/66;H01L29/792;G11C16/04;H01L21/28 主分类号 H01L27/115
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A method of manufacturing a non-volatile memory device having a three-dimensional (3-D) structure, the method comprising: forming a plurality of memory cells stacked along a plurality of U-shaped channels, each comprising a pipe channel, a drain-side channel and a source-side channel, wherein the plurality of U-shaped channels are arranged in a first direction and a second direction crossing the first direction; and forming a plurality of bit lines extended in the second direction and coupled to the drain-side channel of each of the U-shaped channels, wherein the U-shaped channels are arranged in the second direction form a channel column, the U-shaped channels included in one of the channel columns are staggered in the first direction and each of the channel columns is coupled to at least two of the bit lines.
地址 Gyeonggi-do KR