| 摘要 |
PURPOSE:To obtain a dynamic BT capable of using a counter as a pattern generator by allowing a microprocessor to execute a defined instruction as a substitute for an undefined instruction. CONSTITUTION:This microprocessor 101 is provided with an instruction decoding part 13 for decoding an instruction code inputted from the external, generating plural execution control signals, and if an instruction code is an undefined instruction, generating a logical NOT signal and a control means 15 for controlling whether the logical NOT signal is to be validated or invalidated in accordance with a test signal inputted from the external. In a test mode, the undefined instruction is executed as a NOP instruction. Consequently, the microprocessor capable of using the counter 17 as the pattern generator can be obtained. |
