发明名称 INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To confirm stored code number of a code memory circuit by a tester by controlling a transfer gate and other transfer gate so as not to simultaneously become conductive in response to a potential level to be applied to test mode signal input terminals. CONSTITUTION:When a ROM code number stored in a code memory circuit 1 is confirmed, 5V is, for example, applied to a test mode signal input terminal PAD1. Then, transistors TRTrs 1, 2,..., 4 of a select circuit 2 of the circuit 1 are turned ON, whether the TR of the circuit 1 is of enhancement or depression can be decided from signal terminals PADs 2, 3,..., information of ROM code number is obtained, and the TR of a select circuit 3 becomes '0'. The PAD1 is fixed, for example, to 0V at the time of normal operation. Then, all the TRs of the circuit 3 become ON, the signals from the PADs 2, 3,... are input and output to be operated without fail, and the Tr of the circuit 3 becomes '0'. Thus, transfer gates can be controlled so as not to be conductive simultaneously in response to the applied potential level.</p>
申请公布号 JPH04170798(A) 申请公布日期 1992.06.18
申请号 JP19900297516 申请日期 1990.11.02
申请人 NEC YAMAGATA LTD 发明人 HONMA AKIHIRO
分类号 G11C17/00;G11C29/00;G11C29/04 主分类号 G11C17/00
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